Challenges of Programming Multicore Systems
Operating system designers must write scheduling algorithms that use multiple processing cores and application programmers, mustmodify existing programs and design new programs that are multithreaded. More ...
Binary Number Representation and Binary Math
Computers perform all of their amazing work with only two voltage levels, one representing binary 0, the other representing binary 1. This article describes how to perform binary addition and subtraction. More ...
AMD's Phenom Processor
AMD released the first Phenom processor in 2007. Unlike Intel's Core 2 Quad processors, which are a multi-chip module (MCM) design, AMD's Phenom processors had all cores on the same silicon die. More ...
Dynamic Loading of Program Routines and Dynamically linked libraries (DLLs)
In order to execute, it is not necessary for an entire program to be in physical memory. With dynamic loading, a routine is not loaded until it is called. More ...
First-Come, First-Served CPU Scheduling Algorithm
CPU Scheduling deals with the problem of deciding which of the processes in the ready queue is to be alocated the CPU. There are many different CPU scheduling algorithms. In this article we describe first-come, first-served scheduling. More ...
Operating System Memory Allocation Methods
Operating System Memory Allocation is the process of assigning blocks of main memory to various running processes and to move processes back and forward between the main memory and disk. More ...
The Microcontroller Memory Map
a microcontroller is a set of resources. Each resource is identified by one or more addresses in an address space. The memory map is a graphic representation of how the resources are associated with addresses. More ...
Intel's Sandy Bridge Micro-Architecture
"Sandy Bridge" is Intel's code name for a new cpu core microarchitecture. It introduces a few new or improved features. The memory controller, the PCI Express controller, and video circuitry are all located within the processor die and the new ring architecture uses a Last Level Cache between the CPU and graphics cores. More ...
Processor Affinity in Symmetric Multiprocessing
Processor Affinity refers to a process's tendency to continue running on the processor on which it is currently running. When a process executes on a CPU, that process's cache is populated with its most recently accessed data, if a process is moved to a different CPU, that second processor's cache must be populated with that data. More ...
Expanding the Resources of Microcontrollers
In some cases it is possible that the internal resources of a microcontroller are insufficient. The solution to these situations is to add external components by creating an expanded microcontroller structure. More ...
Getting started with Raspberry Pi
So you have a Raspberry Pi, or you're thinking of getting one, and you want to know how to get started and how to become a master user of one. More ...
Intel's Dual-Core Core i3 Processor
Core i3 is an entry-level 2-core processor using the 32nm Westmere micro-architecture. With a Thermal Design Power (TDP) of 73 watts, the i3-530 is a cool-running chip that doesn't gobble loads of electricity, so those looking for a power-efficient, quiet machine will be happy with it. More ...
