Operating System Memory Page Sharing
In a paged environment sharing of memory among processes provides numerous benefits including sharing non-self-modifying reentrant code and interprocess communication. More ...
Intel's Dual-Core Core i3 Processor
Core i3 is an entry-level 2-core processor using the 32nm Westmere micro-architecture. With a Thermal Design Power (TDP) of 73 watts, the i3-530 is a cool-running chip that doesn't gobble loads of electricity, so those looking for a power-efficient, quiet machine will be happy with it. More ...
Virtual Memory and Memory Paging
In the early days of computers, memory chips were small capacity, scarce, and expensive. Because of this a memory management scheme called paging was invented. More ...
Dynamic Loading of Program Routines and Dynamically linked libraries (DLLs)
In order to execute, it is not necessary for an entire program to be in physical memory. With dynamic loading, a routine is not loaded until it is called. More ...
Change Raspberry Pi Default Configuration
If you are a US user of the Raspberry Pi, you will discover that when you type, the characters displayed do not match our keyboard. When you type [shift][#] instead you get the British pound symbol. This is because Raspbian (and NOOBS) defaults to UK keyboard settings. More ...
The Fetch, Decode, Execute Cycle
The Fetch, Decode, Execute cycle is paramount to the functioning of a microprocessor. In this article I'll describe the Fetch, Decode, Execute cycle simplified to its bare-bones in a highly simplified fictitious microprocessor. More ...
Online Color Coded Resistor Calculator
To determine the resistance value of a color-coded resistor, select the colors matching each band from the drop-down lists. More ...
The Microcontroller's Asynchronous Serial Interface
An Asynchronous Serial Interface sends data one bit at a time, as apposed to a parallel interface which send one byte or one word at a time, and asynchronous means it sends them when its ready, without reference to a clock signal. More ...
Network on a Chip (NoC)
NoC (Network on a Chip) is a method of placing a much larger number of processors on a multi-core chip. Much like a regular network, NoC has multiple point-to-point data links that are interconnected by routing switches. More ...
Processor Interrupts
An interrupt is a signal to the processor indicating an event has occurred that needs immediate attention. When an interrupt occurs, the processors normal path of execution is interrupted in order to run a routine to service the interrupt requester. More ...
Intel's Core i7 Processors
Core i7 is a family of Intel quad core processors, that is, they have four processors on a single silicon chip. All four processor cores and all memory caches, including a 64K L1 cache, a 256K L2 cache, and a shared L3 cache are located on one chip. The memory is also located on the same chip. More ...
Microcontroller Internal EEPROM (Electrically Erasable Programmable Read Only Memory) Memory
In some situations it is required that some program parameters such as configuration settings be keept after the system is powered off. This is made possible by including a EEPROM internally to the microcontroller. More ...
