Interrupt Request Lines (IRQs)
What happens when the CPU (Central Processor Unit) is busy doing something, like defragmenting the hard disk, and you press a key on the keyboard? An interrupt (IRQ) is a connection between a hardware device and the CPU. A hardware device uses it's assigned IRQ line to signal or interrupt the CPU when it needs attention. More ...
Basic Decoder Circuitry
A microprocessors is a circuit that reads and execute program instructions called opcodes. A decoder is a circuit that converts an opcode into signals tused to control the circuitry of the microprocessor to enable it to perform the instruction. More ...
Round-Robin CPU Scheduling Algorithm
CPU Scheduling deals with the problem of deciding which of the processes in the ready queue is to be alocated the CPU. There are many different CPU scheduling algorithms. In this article we describe round-robin CPU scheduling. More ...
Monolithic Kernel vs Microkernel vs Hybrid Kernel
An operating system consists of two parts, the kernel space which operates in privileged mode, and the user space which operates in unprivileged mode. More ...
Operating System Memory Page Sharing
In a paged environment sharing of memory among processes provides numerous benefits including sharing non-self-modifying reentrant code and interprocess communication. More ...
Digital Logic Semiconductor Families
logic family refers to the way the semiconductors are designed to create gates. The first highly popular logic family, available in 1964, was TTL (Transistor-Transistor Logic). More ...
Difference between Stack, Heap, and Queue
Stack, heap, and queue are ways that elements are stored in memory. Stack elements are added to the top of the stack, and removed from the top of the stack. The mnemonic LIFO is used to describe a stack (Last-In-First-Out). With a queue, the first one in is the first one out. The mnemonic FIFO is used to describe a queue. A heap is an area of memory where elements can be stored and removed in any order. More ...
ARM Cortex-A72 Registers
16 registers r0 - r15 are accessable in the ARM Cortex-A72 user mode. In addition part of the CPSR (Current Program Status Register) is accessable. That part is the APSR (Application Program Status Register) which contains conditional status bits. More ...
Intel's Core 2 Processors
Intel's Core 2 processors, released in July of 2006, are based on the Core microarchitecture, a dual core design using a 65nm manufacturing process to put 291 million transistors on a 143 square mm die. Each core has its own 64KB L1 cache. The two cores share an L2 cache that can be either 2MB or 4MB. More ...
Capacitors in AC Circuits
In an AC circuit capacitors exhibit a property similar to resistance called reactance and cause a phase shift between votage and current. The vector sum of resistance and reactance in an AC circuit is called impedance. More ...
Multilevel Queue CPU Scheduling Algorithm
With many CPU scheduling algorithms, all processes are placed in a single queue, and the scheduler selects the process to run. In practice, it is often easier to have separate queues for each priority, and the scheduler simply selects the process in the highest-priority queue. More ...
Operating System Boot
The procedure of starting a computer by loading the kernel is known as booting the system. On most computer systems, a small piece of code known as the bootstrap program or bootstrap loader locates the kernel loads it into main memory, and starts its execution. More ...
