Binary Number Representation and Binary Math
Computers perform all of their amazing work with only two voltage levels, one representing binary 0, the other representing binary 1. This article describes how to perform binary addition and subtraction. More ...
Round-Robin CPU Scheduling Algorithm
CPU Scheduling deals with the problem of deciding which of the processes in the ready queue is to be alocated the CPU. There are many different CPU scheduling algorithms. In this article we describe round-robin CPU scheduling. More ...
First-Come, First-Served CPU Scheduling Algorithm
CPU Scheduling deals with the problem of deciding which of the processes in the ready queue is to be alocated the CPU. There are many different CPU scheduling algorithms. In this article we describe first-come, first-served scheduling. More ...
The Motherboard Chipset
Because the chipset dictates the bus speed, type and amount of memory, and the type and number of I/O ports, much of a computer's performance is determined by its chipset. More ...
Operating System Memory Protection in a Paged Environment
Memory protection in a paged environment is accomplished by protection bits associated with each frame. For example read-write, read-only or execute-only bit, and valid-invalid bit. Normally, these bits are kept in the page table. More ...
The Android Operating System
Android os is similar to Apple ios in that it is a layered stack of software that provides a rich set of frameworks for developing mobile applications. At the bottom of this software stack is the Linux kernal. More ...
The Microcontroller Interrupt System
Events related to peripheral interfaces are asynchronous to the program running on the CPU. The interrupt mechanism allows an external event to temporarily put the normal execution of the microcontroller on hold and force the execution of a specific subroutine. More ...
Operating System Memory Paging
Paging is a memory management scheme that permits a process's physical address space to be noncontiguous. More ...
Intel's Core 2 Processors
Intel's Core 2 processors, released in July of 2006, are based on the Core microarchitecture, a dual core design using a 65nm manufacturing process to put 291 million transistors on a 143 square mm die. Each core has its own 64KB L1 cache. The two cores share an L2 cache that can be either 2MB or 4MB. More ...
Priority CPU Scheduling Algorithm
CPU Scheduling deals with the problem of deciding which of the processes in the ready queue is to be alocated the CPU. There are many different CPU scheduling algorithms. In this article we describe priority CPU scheduling. More ...
Data Structures - Linked List, Stack, Queue, and Tree
An array is a simple data structure in which each element can be accessed directly. But what about storing an item whose size may vary? And what about removing an item if the relative positions of the remaining items must be preserved? In such situations other data structures may be needed. More ...
CPU Process Scheduling
CPU scheduling is the basis of multiprogrammed operating systems. By switching the CPU among processes, the operating system can make the computer more productive. More ...
